Microchip Polarfire SoC series - #1 Installing the tools and building the video kit reference design

Welcome to the first blog post in the Microchip PolarFire SoC series! I am going to show you how to set up the tools, build the reference design, and program the board.

More blog posts are coming, diving deeper into the tools, device features, and much more!

Full disclaimer: this video is not sponsored by Microchip and the video kit has been bought by Starware Design.

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FPGA meets DevOps UPDATED! - AMD / Xilinx Vivado and Petalinux + Git

A couple of years ago I wrote a few blog posts regarding FPGA and devops; in particular on how to use Xilinx/AMD Vivado with git, Jenkins and docker. 

With these new blog posts, I am going to update that content using Vivado 2022.2. I will also replace Jenkins with Gitlab for continuous integration.

I want to show you that it is not difficult nor expensive to get started with devops for FPGA development. 

In this blog post, I am going to show you how to use version control for Xilinx/AMD Vivado and Petalinux projects. I am going to use git, but you can use SVN or other version control tools.

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FPGA meets DevOps UPDATED! - AMD/Xilinx Vivado and Petalinux integration with Docker and GitLab

In the previous blog post [link] I have shown you how to use version control (git in particular) for Xilinx/AMD Vivado and Petalinux projects.

In this blog post, we’re going to integrate AMD/Xilinx Vivado and Petalinux with Gitlab CI.

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FPGA meets DevOps - System and FPGA version

In the previous blog posts we have created a system to build automatically (or with a single button) the FPGA bitstream.

Let’s imagine a bug is flagged after a bitstream has been released. The questions we need to answer to fix the problem are:

1. What is the version affected?
2. What is the source code set that was used to build that particular version?

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