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FPGA meets DevOps UPDATED! - AMD / Xilinx Vivado and Petalinux + Git

A couple of years ago I wrote a few blog posts regarding FPGA and devops; in particular on how to use Xilinx/AMD Vivado with git, Jenkins and docker. 

With these new blog posts, I am going to update that content using Vivado 2022.2. I will also replace Jenkins with Gitlab for continuous integration.

I want to show you that it is not difficult nor expensive to get started with devops for FPGA development. 

In this blog post, I am going to show you how to use version control for Xilinx/AMD Vivado and Petalinux projects. I am going to use git, but you can use SVN or other version control tools.

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FPGA meets DevOps - System and FPGA version

In the previous blog posts we have created a system to build automatically (or with a single button) the FPGA bitstream.

Let’s imagine a bug is flagged after a bitstream has been released. The questions we need to answer to fix the problem are:

  1. What is the version affected?
  2. What is the source code set that was used to build that particular version?

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FPGA meets DevOps - Metrics

In the previous blog post we learned how to integrate Xilinx Vivado with Docker and Jenkins to build automatically (or with a single button) the FPGA bitstream.

During the project life span, the FPGA bitstream is going to be built a large number of times. Wouldn’t be interesting to collect metrics from each build and track them?

In this blog post of the series “FPGA meets DevOps” I am going show you how to get metrics from a Xilinx Vivado build and track them in Jenkins using the Plot plugin.

In particular we are going to track resource usage (i.e. LUT, FF, DSP and memory). This gives you insight on how the resource usage evolved during the project life span and if the FPGA is getting too full.

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FPGA meets DevOps - Xilinx Vivado with Docker and Jenkins

In this second blog post of the series “FPGA meets DevOps” I am going show you how to integrate Xilinx Vivado with Docker and Jenkins.

Docker provides a lightweight operating system level virtualisation. It allows developers to package up an application with all the parts it needs in a container, and then ship it out as one package. A container image is described by a file (Dockerfile) which contains a sequence of commands to create the image itself (i.e.: packages to install, configuration tasks, etc) and it is all you need to replicate the exact build environment on another machine.

The objective is to create a container that will run Vivado in headless mode (without user interface) to build the FPGA image.

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Starware Design provides design and consulting services for FPGA, board-level, embedded software and edge AI projects.


Whether you need a consultant to be part of your team on-site or a turnkey solution, Starware Design has the capability to suit your requirements.